| Company |
Silicon Space Technology Corporation (Austin, TX) |
| Technology |
Hardened Dual-Port (DP) Static Random Access Memory (SRAM) buffers high speed data between image sensors and processors in Ballistic Missile Defense System (BMDS) interceptors. |
| Description |
SST developed DP SRAM for their portfolio of hardened integrated circuits. SST patented Harden-By-Isolation (HBI) process technology to be immensely effective in preventing failures in extreme high-temperature, natural space radiation and anticipated nuclear weapon environments. HBI techniques implement non-invasively into any commercial Complementary Metal-Oxide Semiconductor (CMOS) manufacturing process. HBI used in a CMOS process can manufacture variants of existing commercial devices or new Application Specific Integrated Circuits (ASICs). SST developed HBI as a dual-use technology for industrial high-reliability medical, aerospace and select military products. The DP SRAM is manufactured in a HBI enhanced Texas Instruments' (TI) commercial 130 nanometer CMOS process to maximize yield and reduce cost. The DP SRAM also employs design techniques to improve upset tolerance. |
| MDA Use |
The radiation and circuit performance of the DP SRAM demonstrates high-reliability interceptor electronics at low cost. SST devices are applicable to aid BMDS elements' capabilities to mitigate weapons of mass destruction. |
| Insertion Opportunity |
HBI makes possible additional hardened conversions of TI commercial circuits like FireWire™ communication products and high-speed floating point Digital Signal Processors without redesign. These products are integral to the Common Inertial Measurement Unit being developed by Kearfott Corporation. |
